移植好st的tf-a文件后，修改自己板子对应的设备树，注意备份
设备树在tf-a/tf-a-stm32mp-2.2.r1/fdts中

stm32mp157d-szm.dts:

// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
 * Author: Shao Zheming > for study.
 */
/dts-v1/;

#include "stm32mp157.dtsi"
#include "stm32mp15xd.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxaa-pinctrl.dtsi"
#include "stm32mp15xx-szm.dtsi" /* edx系列的通用开发文件，同样需要备份修改 */
#include <dt-bindings/soc/st,stm32-etzpc.h>

/ {
  model = "STMicroelectronics STM32MP157D eval daughter";
  compatible = "st,stm32mp157d-ed1", "st,stm32mp157";

  chosen {
    stdout-path = "serial0:115200n8"; /* 标准输出serial0，不是开发板上的 */
  };

  aliases {
    serial0 = &uart4; /* 设置serial0是对应开发板的串口4 */
  };
};

&cpu1 {
  cpu-supply = <&vddcore>;
};

&etzpc {
  st,decprot = <
    DECPROT(STM32MP1_ETZPC_USART1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)
    DECPROT(STM32MP1_ETZPC_SPI6_ID, DECPROT_NS_RW, DECPROT_UNLOCK)
    DECPROT(STM32MP1_ETZPC_I2C4_ID, DECPROT_NS_RW, DECPROT_UNLOCK)
    DECPROT(STM32MP1_ETZPC_I2C6_ID, DECPROT_NS_RW, DECPROT_UNLOCK)
    DECPROT(STM32MP1_ETZPC_RNG1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)
    DECPROT(STM32MP1_ETZPC_HASH1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)
    DECPROT(STM32MP1_ETZPC_DDRCTRL_ID, DECPROT_S_RW, DECPROT_LOCK)
    DECPROT(STM32MP1_ETZPC_DDRPHYC_ID, DECPROT_S_RW, DECPROT_LOCK)
    DECPROT(STM32MP1_ETZPC_STGENC_ID, DECPROT_S_RW, DECPROT_LOCK)
    DECPROT(STM32MP1_ETZPC_BKPSRAM_ID, DECPROT_S_RW, DECPROT_LOCK)
    DECPROT(STM32MP1_ETZPC_IWDG1_ID, DECPROT_S_RW, DECPROT_LOCK)
  >;
};

stm32mp157d-szm.dtsi:

删除vin和PMIC节点

// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
 */

#include <dt-bindings/clock/stm32mp1-clksrc.h>
#include <dt-bindings/power/stm32mp1-power.h>
#include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"

/ {
  memory@c0000000 {
    device_type = "memory";
    reg = <0xC0000000 0x40000000>;
  };
  /* 2022/05/18 shaozheming 修改 18-52 加入相关电源 */
  /* 芯片内核电源 */
  vddcore: regulator-vddcore {
    compatible = "regulator-fixed";
    regulator-name = "vddcore";
    regulator-min-microvolt = <1200000>;
    regulator-max-microvolt = <1350000>;
    regulator-off-in-suspend;
    regulator-always-on;
  };
  /* 描述3.3电源 */
  v3v3: regulator-3p3v {
    compatible = "regulator-fixed";
    regulator-name = "v3v3";
    regulator-min-microvolt = <3300000>;
    regulator-max-microvolt = <3300000>;
    regulator-off-in-suspend;
    regulator-always-on;
  };
  /* 描述vdd */
  vdd: regulator-vdd {
    compatible = "regulator-fixed";
    regulator-name = "vdd";
    regulator-min-microvolt = <3300000>;
    regulator-max-microvolt = <3300000>;
    regulator-off-in-suspend;
    regulator-always-on;
  };
  /* Vdd-usb电源 */
  vdd_usb: regulator-vdd-usb {
    compatible = "regulator-fixed";
    regulator-name = "vdd_usb";
    regulator-min-microvolt = <3300000>;
    regulator-max-microvolt = <3300000>;
    regulator-off-in-suspend;
    regulator-always-on;
  };
};

&bsec {
  board_id: board_id@ec {
    reg = <0xec 0x4>;
    st,non-secure-otp;
  };
};

&clk_hse {
  st,digbypass;
};

&cpu0{
  cpu-supply = <&vddcore>;
};

&hash1 {
  status = "okay";
};

&i2c4 {
  pinctrl-names = "default";
  pinctrl-0 = <&i2c4_pins_a>;
  i2c-scl-rising-time-ns = <185>;
  i2c-scl-falling-time-ns = <20>;
  clock-frequency = <400000>;
  status = "okay";
  secure-status = "okay";
};

&iwdg2 {
  timeout-sec = <32>;
  status = "okay";
  secure-status = "okay";
};

&nvmem_layout {
  nvmem-cells = <&cfg0_otp>,
          <&part_number_otp>,
          <&monotonic_otp>,
          <&nand_otp>,
          <&uid_otp>,
          <&package_otp>,
          <&hw2_otp>,
          <&pkh_otp>,
          <&board_id>;

  nvmem-cell-names = "cfg0_otp",
         "part_number_otp",
         "monotonic_otp",
         "nand_otp",
         "uid_otp",
         "package_otp",
         "hw2_otp",
         "pkh_otp",
         "board_id";
};

&pwr_regulators {
  system_suspend_supported_soc_modes = <
    STM32_PM_CSLEEP_RUN
    STM32_PM_CSTOP_ALLOW_LP_STOP
    STM32_PM_CSTOP_ALLOW_LPLV_STOP
    STM32_PM_CSTOP_ALLOW_STANDBY_DDR_SR
  >;
  system_off_soc_mode = <STM32_PM_CSTOP_ALLOW_STANDBY_DDR_OFF>;
  vdd-supply = <&vdd>;
  vdd_3v3_usbfs-supply = <&vdd_usb>;
};

&rcc {
  st,hsi-cal;
  st,csi-cal;
  st,cal-sec = <60>;
  st,clksrc = <
    CLK_MPU_PLL1P
    CLK_AXI_PLL2P
    CLK_MCU_PLL3P
    CLK_PLL12_HSE
    CLK_PLL3_HSE
    CLK_PLL4_HSE
    CLK_RTC_LSE
    CLK_MCO1_DISABLED
    CLK_MCO2_DISABLED
  >;

  st,clkdiv = <
    1 /*MPU*/
    0 /*AXI*/
    0 /*MCU*/
    1 /*APB1*/
    1 /*APB2*/
    1 /*APB3*/
    1 /*APB4*/
    2 /*APB5*/
    23 /*RTC*/
    0 /*MCO1*/
    0 /*MCO2*/
  >;

  st,pkcs = <
    CLK_CKPER_HSE
    CLK_FMC_ACLK
    CLK_QSPI_ACLK
    CLK_ETH_DISABLED
    CLK_SDMMC12_PLL4P
    CLK_DSI_DSIPLL
    CLK_STGEN_HSE
    CLK_USBPHY_HSE
    CLK_SPI2S1_PLL3Q
    CLK_SPI2S23_PLL3Q
    CLK_SPI45_HSI
    CLK_SPI6_HSI
    CLK_I2C46_HSI
    CLK_SDMMC3_PLL4P
    CLK_USBO_USBPHY
    CLK_ADC_CKPER
    CLK_CEC_LSE
    CLK_I2C12_HSI
    CLK_I2C35_HSI
    CLK_UART1_HSI
    CLK_UART24_HSI
    CLK_UART35_HSI
    CLK_UART6_HSI
    CLK_UART78_HSI
    CLK_SPDIF_PLL4P
    CLK_FDCAN_PLL4R
    CLK_SAI1_PLL3Q
    CLK_SAI2_PLL3Q
    CLK_SAI3_PLL3Q
    CLK_SAI4_PLL3Q
    CLK_RNG1_LSI
    CLK_RNG2_LSI
    CLK_LPTIM1_PCLK1
    CLK_LPTIM23_PCLK3
    CLK_LPTIM45_LSE
  >;

  /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
  pll2: st,pll@1 {
    compatible = "st,stm32mp1-pll";
    reg = <1>;
    cfg = <2 65 1 0 0 PQR(1,1,1)>;
    frac = <0x1400>;
  };

  /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
  pll3: st,pll@2 {
    compatible = "st,stm32mp1-pll";
    reg = <2>;
    cfg = <1 33 1 16 36 PQR(1,1,1)>;
    frac = <0x1a04>;
  };

  /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
  pll4: st,pll@3 {
    compatible = "st,stm32mp1-pll";
    reg = <3>;
    cfg = <3 98 5 7 7 PQR(1,1,1)>;
  };
};

&rng1 {
  status = "okay";
  secure-status = "okay";
};

&rtc {
  status = "okay";
  secure-status = "okay";
};
/* 2022/05/18 shaozheming 226-245 修改sd卡设置*/
&sdmmc1 {
  pinctrl-names = "default";
  pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
  st,neg-edge;
  broken-cd;
  bus-width = <4>;
  vmmc-supply = <&v3v3>;
  status = "okay";
};

&sdmmc2 {
  pinctrl-names = "default";
  pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
  non-removable;
  st,neg-edge;
  bus-width = <8>;
  vmmc-supply = <&v3v3>;
  vqmmc-supply = <&v3v3>;
  status = "okay";
};

&timers15 {
  secure-status = "okay";
  st,hsi-cal-input = <7>;
  st,csi-cal-input = <8>;
};

&uart4 {
  pinctrl-names = "default";
  pinctrl-0 = <&uart4_pins_a>;
  status = "okay";
};
/* 2022/05/18 shaozheming 259-268 修改USB_OTG */
&usbotg_hs {
  phys = <&usbphyc_port1 0>;
  phy-names = "usb2-phy";
  usb-role-switch;
  status = "okay";
};

&usbphyc {
  status = "okay";
};

&usbphyc_port0 {
  phy-supply = <&vdd_usb>;
};

&usbphyc_port1 {
  phy-supply = <&vdd_usb>;
};

编译

基于STM32MP157的tf-a移植_#include

serialboot修改

我们构建的系统烧写目录中，用到了正点原子出厂镜像中的stm32mp157datk-serialboot.stm32，前面讲了，STM32CubeProgrammer 首先通过 USB 或串口向开发板下载stm32mp157d-atk-serialboot.stm32，名字里面有个“serialboot”，翻译过来就是串行启动，此镜像主要用于初始化 DDR，并且提供 USB 或串口功能，目的是为了进一步将 uboot 镜像下载到 DDR的指定位置，最终通过 uboot 来向外部 flash 设备烧写整个系统镜像。
基于STM32MP157的tf-a移植_#include_02
基于STM32MP157的tf-a移植_开发板_03

主要是给自己看的，所以肯定会出现很多错误哈哈哈哈哈