FPGA 学习 00 二选一多路选择器

mux2.v

	
module mux2(
//端口列表	
	a,  //key0 1
	b,		//key1 1
	sel,	//key2 1
	out	//1:led熄灭  0： led亮
);

// key1 按下 释放
// key0 按下 释放
// key2 按下 
// key1 按下 释放
// key0 按下 释放
	
//端口类型定义
	input a;
	input b;
	input sel;
	
	output out;

	assign out = sel? b:a;
//	assign out = (sel == 1)? b:a;

endmodule

mux2_tb.v

`timescale 1ns/1ns

module mux2_tb();
	
	//激励源
	reg s1;   //a
	reg s2;	//b
	reg s3;	//sel
	
	wire Light1;
	
	mux2 mux2_i0(
	//端口列表	
		.a(s1),
		.b(s2),
		.sel(s3),
		.out(Light1)
	);
	
	initial begin
		s1 = 0;s2 = 0;s3 =0;
		
		#100;
		s1 = 1;s2 = 0;s3 =0;
	
		#100;
		s1 = 0;s2 = 1;s3 =0;
		
		#100;
		
		s1 = 1;s2 = 1;s3 =0;
		#100;
		
		s1 = 0;s2 = 0;s3 =1;
		
		#100;
		s1 = 1;s2 = 0;s3 =1;
	
		#100;
		s1 = 0;s2 = 1;s3 =1;
		
		#100;
		s1 = 1;s2 = 1;s3 =1;
		
		#100;
		
		$stop;
	
	end

	
endmodule

引脚定义：

input a —> key0 --> M16
input b —> key1 --> E15
input sel —> E16
output out; —> A2